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Rajat Jaiswal
I am a Computer Science & Engineering graduate from
IIT Delhi.
My interests lie in the financial market and the technology that enables the same.
I am currently building AlgoTest, with an aim to democratize access to cutting edge
research and execution tools for retail traders, at par with the tools used by the top hedge funds and proprietary trading firms.
I’ve always enjoyed mathematics and its application in solving complex and challenging problems.
I also have a very keen interest in the field of machine learning.
Curriculum Vitae  / 
LinkedIn  / 
Github
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Co-founder, AlgoTest
September 2021 - Present
At AlgoTest, we are continuously building tools to help retail traders make better decisions for their investments. Our first product is a free options backtester for India.
AlgoTest.in is a platform that offers free backtesting for trading strategies in India. Built by expert traders with 10+ years of experience in the markets, both in India and on Wall Street. We invite you to leverage our extensive experience and evaluate your trading strategies for free.
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Quantitative Analyst, TradeScience
August 2020 - May 2021
I was engaged in technical analysis of derivatives market to design systems based on momentum and volatility of underlying asset.
My responsibilities included implementing & backtesting trading strategies, and reviewing trade statistics to optimize strategy performance.
It also involved triangulating novel solutions to increase profit, reduce drawdown, for maintaining strong risk-adjusted portfolios.
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Projects
Here are some selected projects that I have worked on
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Motion Planning for Mobile Robot
code
A reinforcement learning model for an autonomous agent in a grid world domain. The problem is modeled as a Markov Decision Process and policy for states is determined using value iteration. Covergence is determined by combined criteria of policy change and max norm of value change.
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PageRank using MapReduce
code
A pipeline to solve Google's PageRank algorithm using the MapReduce paradigm for distributed computing. Multi-threaded MapReduce library is developed utilizing the MPI for split-apply-combine strategy, outperforming the standard MapReduce-C++ & MapReduce-MPI libraries.
Picture Credit
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Advanced RISC Machine based Processor
code
A 32-bit CPU designed for complete ARMv7 instruction set, writtten in Very High Speed Integrated Circuit Hardware Description Language(VHDL), and implemented on Basys3 Field Programmable Gate Array(FPGA) Board
Picture Credit
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Traffic Simulator
code
A C++ simulator for Indian road traffic intersection, using OpenGL for GUI rendering. It supports realistic lane change behavior for Indian traffic. The simulator can be visualized on terminal as well as OpenGL.
Picture Credit
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Platform Game
code
A multi-leveled role-playing based arcade game developed using impact.js. Fun to play for people like me who loved the 8-bit retro world and always look back to the games we played as a child to unwind.
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Functional Language Interpreter
code
A compiler with call-by-name(Krivine Machine) and call-by-value(SECD Machine) semantics, implemented in OCaml. It takes tokens generated from a Lexer to create an Abstract Syntax Tree using recursive Parser.
Picture Credit
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Last updated on 19th June 2022
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The template for this website is borrowed from this guy
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